Z80 EEPROM Programmer
The following describes how to build a Z80 system with EEPROM which can be programmed over a USB link from a PC.This design is ideal because of the following reasons:
1. It does not require a pre-programmed EEPROM, and so it is suitable for those who do not already have an EEPROM programmer.
2. It can program EEPROMs in about 4 seconds, which is way faster than the 328 seconds that some commercial EEPROM programmers require.
3. The same system can program EEPROMs and then run the code in those EEPROMs, so there is no need to swap chips around when developing code.
4. The PC can automatically switch the system into and out of EEPROM programming mode, so you don't have to push any buttons or flip any switches.
5. Fuck! What more do you want?
2. It can program EEPROMs in about 4 seconds, which is way faster than the 328 seconds that some commercial EEPROM programmers require.
3. The same system can program EEPROMs and then run the code in those EEPROMs, so there is no need to swap chips around when developing code.
4. The PC can automatically switch the system into and out of EEPROM programming mode, so you don't have to push any buttons or flip any switches.
5. Fuck! What more do you want?
I may not be a genius, but the following is sure is clever:
Design
A USB link to a PC is provided by an FT245RL, which provides a simple 8-bit parallel I/O port. To overcome the lack of a pre-programmed ROM, when in programming mode, the system accesses this I/O port in place of normal memory. The PC sends a sequence of bytes that the Z80 reads as a series of instructions to execute. These instructions program the system's SRAM with a small program which is used to program the EEPROM. The EEPROM isn't programmed directly because the high-speed multi-byte programming capability of the AT28C256 requires that bytes be written over a very short period of time, and delays from the USB link may prevent that, so the data to be written to the EEPROM and the code which writes it are written to SRAM to ensure that the operation runs smoothly. Once the EEPROM is programmed and verified, the system is reset with a new memory map that causes the Z80 to boot the EEPROM.
Basics
The following schematics detail only the specifics of this programming interface, and assume that you otherwise know how to build a Z80 system. If you don't already know how to build a Z80 system, then you probably have problems far beyond this page lacking full schematics. However, for those merely looking for a bit of reassurance, here's a quick list of what isn't included in the schematics below:
- Power must be supplied to all chips.
- All data lines of all chips must be connected to all corresponding data lines of all other chips.
- All address lines of all chips must be connected to all corresponding data lines of all other chips, the exception being A15 which is described below, as it is used to select between RAM and EEPROM.
- You'll need a reset circuit of some kind, capable of providing a reset signal at power on.
- You'll need to give the Z80 an appropriate clock signal.
- The Z80 inputs BUSREQ, INT, and NMI should be tied high unless you have other plans for them. If you do have other plans, you'll want to OR the inputs you would attach to those pins with the BURN signal described below, so that those pins remain high during the programming procedure.
- The FTDI chip will need to be connected to a USB connector, as described in its datasheet.
Schematics
First, the system needs to have two states, one which behaves as a normal Z80 system, the other which allows programming of the EEPROM from the PC.
To switch between these two states, the following circuit is used:

The PC will only send data when programming the EEPROM is desired, and so this circuit causes the state of the FT245RL's -RXF signal to be latched as a -BURN signal after each system reset.
Next, the system needs to have two different memory maps according to whether it is in EEPROM programming mode:
To achieve this, a 74-139 and two AND gates are used:

The FT245RL doesn't have a chip select, and so the following circuit is used:

Also, the Z80 needs to wait until data is available from the FT245RL before reading data, and until the FT245RL's FIFO is empty before writing data. This circuit activates the Z80's -WAIT signal in those situations:

Finally, it would be nice if the -RESET signal were activated automatically when a switch to or from programming mode was desired. The following circuit accomplishes this:

It is possible to leave out the automatic reset, and simply reset the system manually when required, but that isn't as much fun.
To switch between these two states, the following circuit is used:
The PC will only send data when programming the EEPROM is desired, and so this circuit causes the state of the FT245RL's -RXF signal to be latched as a -BURN signal after each system reset.
Next, the system needs to have two different memory maps according to whether it is in EEPROM programming mode:
| Address Range | Normal Mode | Programming Mode |
|---|---|---|
| $0000 - $3FFF | EEPROM | FT245RL |
| $4000 - $7FFF | SRAM | |
| $8000 - $BFFF | SRAM | EEPROM |
| $C000 - $FFFF |
To achieve this, a 74-139 and two AND gates are used:
The FT245RL doesn't have a chip select, and so the following circuit is used:
Also, the Z80 needs to wait until data is available from the FT245RL before reading data, and until the FT245RL's FIFO is empty before writing data. This circuit activates the Z80's -WAIT signal in those situations:
Finally, it would be nice if the -RESET signal were activated automatically when a switch to or from programming mode was desired. The following circuit accomplishes this:
It is possible to leave out the automatic reset, and simply reset the system manually when required, but that isn't as much fun.
Software
I've written a Perl script which runs in Linux which programs AT28C256 EEPROMs in 3.8 seconds. It won't work in Windows, and I don't know how to make it work, but I suspect it isn't too difficult for someone who knows how.
So...
Send comments and questions to my email address.